Comparison
Table |
TLA7NAx
 |
TLA7Axx
 |
TLA7Sxx
 |
| Channels |
34, 68, 102, 136 per module |
34, 68, 102, 136 per module |
TLA7S08: 8 ch; TLA7S16: 16 ch |
| Timing |
500 ps (2 GHz)/ 1 ns (1 GHz)/2 ns (500 MHz)(quarter/half/full
channels) |
500 ps (2 GHz)/1 ns (1 GHz)/2 ns (500 MHz)(quarter/half/full
channels) |
N/A |
| MagniVu ™ Timing |
125 ps (8 GHz) with 16 Kb depth |
125 ps (8 GHz) with 16 Kb depth |
N/A |
| Max State Clock Rate |
450 MHz |
800 MHz (half channel mode) |
N/A |
| Record Length |
2 Mb/1 Mb/512 Kb to 128/64/32 Mb (quarter/half/full channels
with timestamp) |
512/256/128 Kb to 256/128/64 Mb(quarter/half/full channels
with timestamp) |
N/A |
| Max Channels per Timebase (merged) |
272 in TLA7012, 680 in TLA7016 |
272 in TLA7012, 680 in TLA7016 |
N/A |
| Max Channels per Mainframe |
272 in TLA7012, 816 in TLA7016 |
272 in TLA7012, 816 in TLA7016 |
N/A |
| Max Channels per System |
2,176 (with eight TLA7012s and one TL708EX); 6,528 (with
eight TLA7016s and one TL708EX) |
2,176 (with eight TLA7012s and one TL708EX); 6,528 (with
eight TLA7016s and one TL708EX) |
N/A |
| Max Independent Buses per System |
16 (with eight TLA7012s and one TL708EX); 48 (with eight
TLA7016s and one TL708EX) |
16 (with eight TLA7012s and one TL708EX); 48 (with eight
TLA7016s and one TL708EX) |
N/A |
| State Clock Rate |
235 MHz std.; 450 MHz opt |
120 MHz std.; 235, 450 MHz opt. |
N/A |
| Max State Data Rate |
470/235 Mb/s (half/full channels) |
1,250/900/450 Mb/s (quarter/half/full channels) |
N/A |
| Simultaneous State and Timing through same probe |
Yes |
Yes |
N/A |
| Analog Measurement through Same Probe |
No |
Yes |
N/A |
| Analog Outputs (four per module-analog MUX) |
No |
Yes |
N/A |
| Source Synchronous Clocking |
No |
Yes |
N/A |
| Memory Depth |
N/A |
N/A |
32M 8b/10b symbols per channel |
| Timestamp Range |
N/A |
N/A |
62 hours |
| Timestamp |
N/A |
N/A |
54-Bits at 25 ps resolution |
| Clocking/Acquisition Modes |
N/A |
N/A |
TLA Module without SSC (Spread Spectrum Clocking), External
Reference Clock (100 MHz +/10% or 125 MHz) with or without SSC |
| External Reference Clock Frequency Tolerance |
N/A |
N/A |
+/- 350 ppm |
| Number of Mainframe Slots Required per TLA Series
Module |
N/A |
N/A |
2 |